7/3/2013

7/3/2013

Things to do:
1. Check results of 2nd NPGS run on EL6 (Spot size 1, @1.5Kv)
2. Grow SiO2 layer on new samples using furnace.
           - 900C for 30min, 1200C for 1hr, back to 900C for 30 min
3. Use wafer with freshly grown SIO2 and spin on PMMA layer
4. Run NPGS, same pattern on PMMA sample, spin on CNTs, and compare to the EL6 sample

Things that were done:

1. When looking at the EL6 sample (NPGS w/ spot size 1 @ 1.5 kV, blanker at position 3) we found that the pattern stopped after writing only 3 and a half lines. However we were able to see that a few CNTs were stuck on the lines. It didn't seem like as many CNTs stuck as when we used the spot size 3 this time but this could be because we only had three complete lines to compare.
       - we believe this could be due to a lack of focus or even a pre exposure to the beam when viewing the original pattern on this particular sample.

2. When growing the SiO2 layer on the new substrate samples I noticed the SiO2 layer was not as visible as the last batch I completed. I used the same temperatures and times so I'm not sure why this is. Instead of a nice purple color (like my last batch), these were just a bit darker than the original Si wafers. Could dirty tubes play a role?? I may try leaving the next batch in the furnace a bit longer to see if that changes my results.

3. We had a bit of trouble focusing the beam and getting the faraday cup to read a reasonable number of pico amps, but with a bit of help from Oscar we were able to continue and pattern a 3x3 array on the PMMA sample. We spun on CNTs and have to wait until 7/4/13 or 7/5/13 to see how well the CNTs stuck.
         - If either the PMMA or EL6 seems to have more aligned CNTs we will be able to rule out one of the variables and only use the more efficient resist from now on. This will give us the ability to start focusing on bake times and pattern sizes and orientation.