7/15/2013

7/15/2013

Things to do:

1. Create the same pattern we used on Friday, five vertical lines with increasing doses (50, 100, 200, 400, 800 nC/cm. Make sure the array is a exact known distance from one corner of the the chip. Try and mark the chip by scratching one corner away from where the pattern is located. * In future scratch the chip just after baking on the resist layer but before dipping it in acetone: this will prevent silicon chips from contaminating the substrate surface.

2. Try dipping the substrate in a solution of CNTs instead of spinning them on with spin coater. We hope to see if the CNTs still stick to the pattern and if they align themselves with the orientation if the vertical lines.

Things that were completed:

1. Cleaned and spun EL6 on our Si/SiO2 substrate. Used electron beam lithography to pattern (5 vertical lines with increasing doses) an array in the center of our chip and another pattern 2000 microns in the positive y direction (up) and 6222.5 microns to the right (direct center on x axis) of the bottom left corner of our sample.